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Welcome to the Memory Organization MCQs Page

Dive deep into the fascinating world of Memory Organization with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Memory Organization, a crucial aspect of Computer Architecture. In this section, you will encounter a diverse range of MCQs that cover various aspects of Memory Organization, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within Computer Architecture.

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Check out the MCQs below to embark on an enriching journey through Memory Organization. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of Computer Architecture.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Memory Organization. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Memory Organization MCQs | Page 6 of 23

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Q51.
Memory interleaving technique is used to address the memory modules in order to have

a.

higher average utilization

b.

faster access to a block of data

c.

reduced complexity in mapping hardware

d.

both a and b

Discuss
Answer: (c).reduced complexity in mapping hardware
Q52.
In a multiprogramming system, which of the following is used

a.

Data parallelism

b.

Paging concept

c.

L1 cache

d.

None of the above

Discuss
Answer: (b).Paging concept
Q53.
Associative memory is some times called as

a.

Virtual memory

b.

Cache memory

c.

Main memory

d.

Content addressable memory

Discuss
Answer: (d).Content addressable memory
Q54.
A more efficient way to organise a Page Table is by means of an associative memory having

a.

Number of words equal to number of pages

b.

Number of words more than the number of pages

c.

Number of words less than the number of pages

d.

Any of the above

Discuss
Answer: (a).Number of words equal to number of pages
Q55.
If there are four ROM ICs of 8K and two RAM ICs of 4K words, than the address range of Ist RAM is (Assume initial addresses correspond to ROMs)

a.

(8000)H to (9FFF)H

b.

(6000)H to (7FFF)H

c.

(8000)H to (8FFF)H

d.

(9000)H to (9FFF)H

Discuss
Answer: (c).(8000)H to (8FFF)H
Q56.
The idea of cache memory is based

a.

on the property of locality of reference

b.

on the heuristic 90-10 rule

c.

on the fact that references generally tend to cluster

d.

all of the above

Discuss
Answer: (a).on the property of locality of reference
Q57.
If memory access takes 20 ns with cache and 110 ns with out it, then the ratio ( cache uses a 10 ns memory) is

a.

93%

b.

90%

c.

88%

d.

87%

Discuss
Answer: (b).90%
Q58.
In a memory-mapped I/O system, which of the following will not be there?

a.

LDA

b.

IN

c.

ADD

d.

OUT

Discuss
Answer: (a).LDA
Q59.
Virtual memory consists of

a.

Static RAM

b.

Dynamic RAM

c.

Magnetic memory

d.

None of these

Discuss
Answer: (a).Static RAM
Q60.
If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be

a.

11 bits

b.

21 bits

c.

16 bits

d.

20 bits

Discuss
Answer: (c).16 bits
Page 6 of 23

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